B3 · Registers and Interrupts

Spec reference: Section B3 - Computer Architecture Key idea: Understand the purpose of CPU registers and how interrupts allow the CPU to respond to events.

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Registers

Registers are small, extremely fast storage locations inside the CPU. They hold data that the CPU is currently working with.

General purpose registers

Used to hold temporary data, operands, and results during calculations. The programmer or compiler can use these freely.

Special purpose registers

Each has a specific, fixed role in controlling the CPU:

Register	Name	Purpose
PC	Program Counter	Holds the memory address of the next instruction to be fetched. Automatically increments after each fetch.
IR	Instruction Register	Holds the instruction that has just been fetched from memory and is being decoded/executed.
MAR	Memory Address Register	Holds the address in memory that the CPU wants to read from or write to.
MDR	Memory Data Register	Holds the data that has just been read from memory, or data waiting to be written to memory. Acts as a buffer between the CPU and RAM.
ACC	Accumulator	Holds the result of arithmetic and logic operations performed by the ALU.

How registers work together in the instruction cycle

1. Fetch: PC sends address to MAR. Memory sends instruction to MDR. MDR copies instruction to IR. PC increments.
2. Decode: CU decodes the instruction in IR.
3. Execute: ALU performs the operation. Result stored in ACC. MAR/MDR used if memory access is needed.

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The role of interrupts

An interrupt is a signal sent to the CPU to indicate that an event requires immediate attention. Interrupts allow the CPU to respond to events without constantly checking (polling) for them.

How interrupts work

1. A device or software sends an interrupt signal to the CPU.
2. The CPU completes its current instruction.
3. The CPU saves its current state (registers, PC) to the stack.
4. The CPU looks up the appropriate Interrupt Service Routine (ISR) in the interrupt vector table.
5. The ISR runs and handles the event.
6. The CPU restores its saved state and resumes where it left off.

Types of interrupt

Type	Cause	Example
Hardware interrupt	Triggered by a hardware device	Keyboard key pressed, mouse click, printer finished
Software interrupt	Triggered by a program	Requesting OS services, system calls
Exception	Error condition in the CPU	Division by zero, illegal memory access

Interrupt priority

Interrupts have priority levels. Higher priority interrupts can interrupt lower priority ISRs. For example, a critical hardware failure will interrupt a routine keyboard handler.

Exam point

The exam often asks you to describe what happens when an interrupt occurs. Remember to mention: saving the current state, looking up the ISR, executing the ISR, and restoring the state.

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Summary

Term	Meaning
PC (Program Counter)	Holds address of the next instruction to fetch
IR (Instruction Register)	Holds the instruction currently being decoded
MAR	Holds the memory address being accessed
MDR	Holds data being transferred to/from memory
Accumulator	Holds the result of ALU operations
Interrupt	A signal asking the CPU to pause and handle an event
ISR	Interrupt Service Routine: the code that handles the interrupt

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